About me

I am currently a Research Scientist at Machine Programming Lab in Intel Labs. My research interests are at the intersection of application of artificial intelligence, machine learning, and formal method techniques to problems in software systems and software engineering. My primary interests are in bug finding, code recommendation, and performance estimation. Recently, I published an automated system, named ControlFlag, that learns to detect programming errors in code. ControlFlag is open-source now, and has been covered by several news outlets such as Communications of ACM, Venturebeat, ZDNet, TechRepublic, etc.

Prior to joining Intel, I was a PhD student at Secure Systems Lab at Stony Brook University, and I was advised by Prof. R. Sekar. At Stony Brook, I conducted research in program analysis, symbolic execution, machine learning techniques to learn code translators, and binary analysis.

Publications

• CWD: A Machine Learning based Approach to Detect Unknown Cloud Workloads [pdf]
  Mohammad Hossain, Derssie Mebratu, Niranjan Hasabnis, Jun Jin, Gaurav Chaudhary, Noah Shen
  In The MLSys Workshop on Cloud Intelligence (AIOps), 2022
  

• Are Machine Programming Systems using Right Source Code Measures to select Code Repositories [pdf], [video]
  Niranjan Hasabnis
  In MaLTeSQuE 2022 workshop to be held with ACM Joint European Software Engineering Conference and Symposium on the Foundations of Software Engineering (ESEC-FSE), November 2022
  

• GitRank: A Framework to Rank GitHub Repositories [pdf], [video], [git]
  Niranjan Hasabnis
  In Mining Software Repositories (MSR), 2022
  

• ControlFlag: A Self-supervised Idiosyncratic Pattern Detection System for Software Control Structures [pdf]
  Niranjan Hasabnis and Justin Gottschlich
  In the 5th Annual Symposium on Machine Programming (MAPS), 2021
  

• Automatic Tuning of Tensorflow’s CPU Backend Using Gradient-Free Optimization Algorithms [pdf]
  Derssie Mebratu, Niranjan Hasabnis, Pietro Mercati, Gaurit Sharma, Shamima Najnin
  In Machine Learning on HPC Systems (MLHPCS-ISC), 2021
  

• Distributed MLPerf ResNet50 Training on Intel Xeon Architectures with TensorFlow [pdf]
  Wei Wang and Niranjan Hasabnis
  In the International Conference on High Performance Computing in Asia-Pacific Region, 2021
  

• ControlFlag: A Self-supervised Idiosyncratic Pattern Detection System for Software Control Structures [pdf]
  Niranjan Hasabnis and Justin Gottschlich
  In Workshop on ML for Systems at NeurIPS, 2020
  

• Auto-tuning TensorFlow’s Threading Model for CPU Backend [pdf]
  Niranjan Hasabnis
  In IEEE/ACM Machine Learning in HPC Environments (MLHPC), 2018
  

• Accelerating TensorFlow on Modern Intel Architectures
  Niranjan Hasabnis, et al.
  In Workshop on Architectures for Intelligent Machines, 2017
  

• Synthesizing Instruction-set semantics using Symbolic Execution of Code Generators [pdf]
  Niranjan Hasabnis and R. Sekar.
  In ACM SIGSOFT International Symposium on Foundations of Software Engineering (FSE), 2016
  

• Lifting Assembly to Intermediate Representation: A Novel Approach Leveraging Compiler [pdf]
  Niranjan Hasabnis and R. Sekar.
  In ACM Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2016
  

• [PhD Thesis] Automatic Synthesis of Instruction Set Semantics and its Applications [pdf]
  Niranjan Hasabnis
  Stony Brook University

• Checking Correctness of Compiler Code Generators [pdf]
  Niranjan Hasabnis, Rui Qiao, and R. Sekar.
  In International Symposium on Code Generation and Optimization (CGO), 2015

• Automatic Generation of Assembly to IR Translators Using Compilers [pdf]
  Niranjan Hasabnis and R. Sekar.
  In Workshop on Architectural and Microarchitectural Support for Binary Translation (AMAS-BT), 2015

• A Platform for Secure Static Binary Instrumentation [pdf]
  Mingwei Zheng, Rui Qiao, Niranjan Hasabnis, and R. Sekar.
  In International Conference on Virtual Execution Environments (VEE), 2014

• Light-weight Bounds Checking [pdf]
  Niranjan Hasabnis, Ashish Misra, and R. Sekar.
  In International Symposium on Code Generation and Optimization (CGO), 2012

Service

• FSE’23, USENIX ATC’23 (PC), MSR’23 (industry PC)
• AIDB’22 (PC), FSE’22 (PC), USENIX ATC’22 (PC), MSR’22 (PC), ASE’22 (industry PC)
• AIDB’21 (PC), MAPS’21 (PC)